
Proceedings Paper
Numerical simulation of thick-linewidth measurements by reflected lightFormat | Member Price | Non-Member Price |
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Paper Abstract
IC fabrication problems grow as nominal feature sizes shrink, due in large part to fundamental optical diffraction limits. Currently, one of the most pressing needs is robust critical dimension measurement. However, optical methods must be refined for this scale of submicron metrology, particularly in the case of thick features. This paper examines the problem of reflected light microscopy for nominal 1 micron high lines on silicon using 2-D, time-domain finite element simulations. The experimental basis is a prototype line width standard that is characterized using optical, contact, and SEM measurements. Microscope and simulated images are compared for 1 and 3 micron wide lines. Good first-order correlation is found between real and synthetic images but model uncertainties need to be reduced and microscope aberrations need to be quantified before second-order differences can be eliminated. Numerical experiments are used to relate images to resonance patterns in the feature; determine the strength of evanescent waves near the line; and contrast isolated and periodic line images as a function of pitch.
Paper Details
Date Published: 1 July 1991
PDF: 17 pages
Proc. SPIE 1464, Integrated Circuit Metrology, Inspection, and Process Control V, (1 July 1991); doi: 10.1117/12.44434
Published in SPIE Proceedings Vol. 1464:
Integrated Circuit Metrology, Inspection, and Process Control V
William H. Arnold, Editor(s)
PDF: 17 pages
Proc. SPIE 1464, Integrated Circuit Metrology, Inspection, and Process Control V, (1 July 1991); doi: 10.1117/12.44434
Show Author Affiliations
Gregory L. Wojcik, Weidlinger Associates, Inc. (United States)
John Mould Jr., Weidlinger Associates, Inc. (United States)
Robert J. Monteverde, VLSI Standards, Inc. (United States)
John Mould Jr., Weidlinger Associates, Inc. (United States)
Robert J. Monteverde, VLSI Standards, Inc. (United States)
Jerry Prochazka, VLSI Standards, Inc. (United States)
John R. Frank, SEMATECH (United States)
John R. Frank, SEMATECH (United States)
Published in SPIE Proceedings Vol. 1464:
Integrated Circuit Metrology, Inspection, and Process Control V
William H. Arnold, Editor(s)
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