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Proceedings Paper

Use of high-level design languages and reconfigurable devices to produce a flexible generic hardware-in-the-loop facility
Author(s): Richard Chamberlain
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Paper Abstract

Matra BAe Dynamics/Nallatech have undertaken the task to produce a fully generic Hardware In The Loop facility designed to flexibly test imaging IR systems. The system was required to allow real hardware and their software models to be seamlessly interchanged including a fully reconfigurable interface to whatever hardware was being tested. This required the adoption of a flexible design methodology to allow the traditional boundaries between hardware and software design to 'blur'. This paper describes the methods used to achieve these design aims. It concentrates in the use of the C programming language to define both the hardware (in the form of reconfigurable FPGA devices) and the software to be used in the system giving concrete examples of the benefits and disadvantages of such an approach. It shows that such an approach can lead to the creation of a system which is cheaper to maintain, easier to modify for new requirements and generally more flexible than conventional strict partitioned systems.

Paper Details

Date Published: 31 August 2001
PDF: 9 pages
Proc. SPIE 4366, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VI, (31 August 2001); doi: 10.1117/12.438085
Show Author Affiliations
Richard Chamberlain, Nallatech Ltd. (United Kingdom)

Published in SPIE Proceedings Vol. 4366:
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing VI
Robert Lee Murrer Jr., Editor(s)

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