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Proceedings Paper

Low-cost nanostructure patterning using step and flash imprint lithography
Author(s): S. V. Sreenivasan; C. Grant Willson; Norman E. Schumaker; Douglas J. Resnick
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Paper Abstract

This article is directed towards nanolithography, which is the unit process required to pattern nanostructures. While the critical dimension in the microelectronics industry is continually going down due to developments in photolithography, it is coming at the expense of exponential increase in lithography tool costs and rising photomask costs. Step and Flash Imprint Lithography (S-FIL) is a nano-patterning technique that not only results in significantly lower cost of the lithography tool and process consumables, but also appears to be at least as good as photolithography in other aspects of patterning costs. In this study, a comparison of SFIL with Extreme Ultraviolet (EUV) photolithography technique is provided at the 50nm node†. Advantages and disadvantages of S-FIL for various application sectors are provided. Finally, cost of ownership (CoO) computations of S-FIL versus EUV is provided. CoO computations indicate that S-FIL may be the cost-effective technology in the sub-100nm domain, particularly for emerging devices that are required in low volumes.

Paper Details

Date Published: 24 July 2002
PDF: 8 pages
Proc. SPIE 4608, Nanostructure Science, Metrology, and Technology, (24 July 2002); doi: 10.1117/12.437804
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Published in SPIE Proceedings Vol. 4608:
Nanostructure Science, Metrology, and Technology
Martin C. Peckerar; Michael T. Postek Jr., Editor(s)

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