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Proceedings Paper

Organic BARC process evaluation for via first dual-damascene patterning
Author(s): Cher-Huan Tan; Moitreyee Mukherjee-Roy; Woo-Min Jo; Rakesh Kumar; Pang Dow Foo; Santhanesh Sathappan; Siew Wei Ngooi
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Paper Abstract

BARC (Bottom Anti-Reflective Coating) is used to minimize thin film interference effects such as swing curve, standing waves and resist notching in the photolithography process. In the 'via first' dual damascene approach, BARC also acts as a protecting layer for the substrate underneath the via during the trench etch step. Conformal BARC is normally used for the patterning due to its uniform film thickness over the surface topography, which can provide good CD control. However, conformal BARC may not be able to provide sufficient substrate protection at the via bottom as BARC film remaining in the via may not be thick enough. In comparison, planarizing BARC has better via filling property which can provide sufficient protection for the via bottom substrate. In this study, four different BARCs; conformal and planarizing at two different viscosities, were evaluated for the 'via first' dual damascene copper patterning process. Low viscosity BARC was used to obtain a thin BARC coating for the partial via filling, while high viscosity BARC was used for full via filling process. We evaluated the performance of BARCs for via filling, depth of focus, exposure latitude, iso-dense feature bias and CD control. Dual damascene pattern was etched using two different etch recipes and we compared the performance of all the four BARCs for final etched pattern formation.

Paper Details

Date Published: 24 August 2001
PDF: 12 pages
Proc. SPIE 4345, Advances in Resist Technology and Processing XVIII, (24 August 2001); doi: 10.1117/12.436913
Show Author Affiliations
Cher-Huan Tan, Institute of Microelectronics (Singapore)
Moitreyee Mukherjee-Roy, Institute of Microelectronics (Singapore)
Woo-Min Jo, Institute of Microelectronics (Singapore)
Rakesh Kumar, Institute of Microelectronics (Singapore)
Pang Dow Foo, Institute of Microelectronics (Singapore)
Santhanesh Sathappan, Institute of Microelectronics (Singapore)
Siew Wei Ngooi, Institute of Microelectronics (Singapore)

Published in SPIE Proceedings Vol. 4345:
Advances in Resist Technology and Processing XVIII
Francis M. Houlihan, Editor(s)

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