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Proceedings Paper

Optimization of dielectric antireflective coatings on a transparent substrate in sub-half-micron CMOS technology
Author(s): Graham G. Arthur; Brian Martin; Christine Wallace
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Paper Abstract

The optimization of a dielectric anti-reflective coating (ARC) on a transparent substrate with significant topography is described. Supporting theory is provided and although it is not possible to obtain the ultimate performance of an ARC over planar film stacks and flat substrates, the critical dimension (CD) swing ratio is greatly reduced and a manufactureable solution achieved using response surface modeling (RSM) in combination with data generated form the lithography simulation tool, PROLITH/2.

Paper Details

Date Published: 22 August 2001
PDF: 9 pages
Proc. SPIE 4344, Metrology, Inspection, and Process Control for Microlithography XV, (22 August 2001); doi: 10.1117/12.436790
Show Author Affiliations
Graham G. Arthur, Rutherford Appleton Lab. (United Kingdom)
Brian Martin, Mitel Semiconductor (United Kingdom)
Christine Wallace, Altis Semiconductor (France)

Published in SPIE Proceedings Vol. 4344:
Metrology, Inspection, and Process Control for Microlithography XV
Neal T. Sullivan, Editor(s)

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