ASIC layout data, which can be large and typically with little hierarchy, can prove challenging for complex optical proximity correction (OPC) operations. Thoughtful coordination between the ASIC library designers and the OPC code developers in terms of design and execution methodologies can result in large savings in run time and additional hierarchy flattening with little or no impact to the library layout density. Results from such a collaboration on IBM’s 0.13um ASIC library resulted in better than order of magnitude improvement for gat e array library cell data preparation

Date Published: 22 January 2001
PDF: 4 pages
Proc. SPIE 4186, 20th Annual BACUS Symposium on Photomask Technology, (22 January 2001); doi: 10.1117/12.410686

Published in SPIE Proceedings Vol. 4186:
20th Annual BACUS Symposium on Photomask Technology
Brian J. Grenon; Giang T. Dao, Editor(s)