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Proceedings Paper

Fault detection in CMOS manufacturing using MBPCA
Author(s): Sivan Lachman-Shalem; Nir Haimovitch; Eitan N. Shauly; Daniel R. Lewin
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Paper Abstract

This paper describes the application of model-based principal component analysis (MBPCA) to the identification and isolation of faults in CMOS manufacture. Some of the CMOS fabrication processing steps are well understood, with first principles mathematical models available which can describe the physical and chemical phenomena that takes place. The fabrication of the device using a known industrial process is therefore first modeled 'ideally', using ATHENA and MATLAB. Detailed furnace models are used to investigate the effect of errors in furnace control on the device fabrication and the subsequent effect on the device electrical properties. This models the distribution of device properties resulting from processing a stack of wafers in a furnace, and allows faults and production errors to be simulated for analysis. The analysis is performed using MBPCA. which has been shown to improve fault-detection resolution for batch processes. The diagnosis method is demonstrated on an industrial NMOS transistor fabrication process with faults introduced in places where they might realistically occur.

Paper Details

Date Published: 23 August 2000
PDF: 10 pages
Proc. SPIE 4182, Process Control and Diagnostics, (23 August 2000); doi: 10.1117/12.410084
Show Author Affiliations
Sivan Lachman-Shalem, Technion--Israel Institute of Technology (Israel)
Nir Haimovitch, Technion--Israel Institute of Technology (Israel)
Eitan N. Shauly, Tower Semiconductors Ltd. (Israel) and Technion--Israel Institute of Technology (Israel)
Daniel R. Lewin, Technion--Israel Institute of Technology (Israel)

Published in SPIE Proceedings Vol. 4182:
Process Control and Diagnostics
Michael L. Miller; Kaihan A. Ashtiani, Editor(s)

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