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Proceedings Paper

Impact of boron penetration on gate oxide reliability and device performance in a dual-gate oxide process
Author(s): Yunqiang Zhang; Chock Hing Gan; Xi Li; James Lee; David Vigar; Ravi Sundaresan
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Paper Abstract

The effect of boron penetration on device performance and gate oxide reliability of P+ polysilicon gate MOSFET of a dual oxide process with salicide block module was investigated. To get stable non-salicided poly sheet resistance, a capping oxide is required before source/drain RTA anneal. It is found that the transistor performance and gate oxide reliability were degraded with the capping oxide. The optimization scheme by replacing BF2 with Boron for P+ implant is demonstrated.

Paper Details

Date Published: 24 October 2000
PDF: 6 pages
Proc. SPIE 4227, Advanced Microelectronic Processing Techniques, (24 October 2000); doi: 10.1117/12.405378
Show Author Affiliations
Yunqiang Zhang, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Chock Hing Gan, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Xi Li, Chartered Semiconductor Manufacturing Ltd. (Singapore)
James Lee, Chartered Semiconductor Manufacturing Ltd. (Singapore)
David Vigar, Chartered Semiconductor Manufacturing, Ltd. (Singapore)
Ravi Sundaresan, Chartered Semiconductor Manufacturing Ltd. (Singapore)

Published in SPIE Proceedings Vol. 4227:
Advanced Microelectronic Processing Techniques
H. Barry Harrison; Andrew Thye Shen Wee; Subhash Gupta, Editor(s)

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