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Proceedings Paper

Dual damascene photo process using negative-tone resist
Author(s): Xuelong Shi; Allen C. Fung; Stephen Hsu; Zongyu Li; Timothy Nguyen; Robert John Socha; Will Conley; Mircea V. Dusa
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Paper Abstract

To further improve device performance, copper has been introduced to replace aluminum as the interconnect material due to its lower resistivity. Copper/low-k dual damascene process requires significant changes in process design and implementation from the traditional aluminum interconnect architecture. There are several implementation schemes for dual damascene architecture, including via first, trench first and buried hard mask. Among these schemes, via first process provides the largest process tolerance for stepper/scanner overlay control in addition to the guaranteed full size vias. However, positive tone resist encounters some difficulties in dual damascene photo process for via first approach, because the resist filled in the via can not be exposed and removed properly, resulting in considerable resist residual in the via after development. In contrast, negative tone resist shows great advantage in this process and demonstrates its capability in producing desired patterns without resist residuals in the via. In this paper, the design of a dual damascene photo process using Shipley UVN30 negative tone resist is evaluated, and experimental results regarding to its process performance are presented.

Paper Details

Date Published: 23 June 2000
PDF: 8 pages
Proc. SPIE 3999, Advances in Resist Technology and Processing XVII, (23 June 2000); doi: 10.1117/12.388369
Show Author Affiliations
Xuelong Shi, Motorola (United States)
Allen C. Fung, Cypress Semiconductor Corp. (United States)
Stephen Hsu, KLA-Tencor Corp. (United States)
Zongyu Li, LAM Research Corp. (United States)
Timothy Nguyen, Maxim Integrated Products (United States)
Robert John Socha, ASML MaskTools (United States)
Will Conley, Motorola (United States)
Mircea V. Dusa, ASML (United States)

Published in SPIE Proceedings Vol. 3999:
Advances in Resist Technology and Processing XVII
Francis M. Houlihan, Editor(s)

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