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Proceedings Paper

Implementation of real-time SAR systems with a high-performance digital signal processor
Author(s): Helge Kloos; Jens Peter Wittenburg; Willm Hinrichs; Hanno Lieske; Peter Pirsch
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Paper Abstract

Real-time Synthetic Aperture Radar (SAR) image synthesis is one of the major problems to solve in the future. To achieve a fully synthesized SAR image, the raw signal must be filtered with a 2-dimensional function representing the system transfer function. These filtering operations are usually processed by multiplication in frequency domain. Therefore, the Fast Fourier Transform (FFT) used for transformation to/from frequency domain is the predominant algorithm in terms of processing power for SAR image synthesis. The presented HiPAR- DSP is a programmable architecture, which is optimized for FFT-dominated applications like SAR image processing. To provide the high requested processing power for these task, the HiPAR-DSP has an array of 4 (HiPAR-DSP4) respectively 16 (HiPAR-DSP16) parallel processing units (datapaths) which is controlled by a single RISC Controller. For data exchange between the processing units there is a shared memory which allows the concurrent access from all processing units in a single clock cycle. So the HiPAR-DSP16 performs a complex FFT with 1024 Samples in 32microsecond(s) . For the implemented SAR- Processing task, the Range Compression with 4096 complex samples per line we achieve a real-time performance of nearly 1500 rangelines/s.

Paper Details

Date Published: 14 December 1999
PDF: 5 pages
Proc. SPIE 3871, Image and Signal Processing for Remote Sensing V, (14 December 1999); doi: 10.1117/12.373239
Show Author Affiliations
Helge Kloos, Univ. of Hannover (Germany)
Jens Peter Wittenburg, Univ. of Hannover (Germany)
Willm Hinrichs, Univ. of Hannover (Germany)
Hanno Lieske, Univ. of Hannover (Germany)
Peter Pirsch, Univ. of Hannover (Germany)

Published in SPIE Proceedings Vol. 3871:
Image and Signal Processing for Remote Sensing V
Sebastiano Bruno Serpico, Editor(s)

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