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Proceedings Paper

Standard postprocessing technique for fabrication of large microsuspended structures in CMOS
Author(s): Bahram Ghodsian; Veljko Milanovic; Orlando Villavicencio
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Paper Abstract

An important problem in silicon micromachining involves fabrication of suspended structures on a chip for both thermal as well as electromagnetic isolations. The problem becomes more pronounced as the size of a suspended structure increase. A new technique to remove the silicon from beneath a large structure, by micromachining for making a suspended microstructure both for thermal, as well as electromagnetic isolations on a CMOS chip is reported. Conventional methods require two steps; front-side etching, isotropic step, followed by an anisotropic etching step. An alternative technique is based on the backside etching process which requires extra masks and processing steps. In order to keep the post-processing steps to a minimum, a simple technique has been developed that exploits the front-side anisotropic etching to a create both under-cuttings as well as deep etching on one single step. This method uses the gate oxide and polysilicon layer in CMOS technology as the sacrificial layer for initiating the under-cutting needed to make a free standing microstructure. The micro-suspension thickness, width and length of 2 micrometers , 150 micrometers X micrometers , respectively, are made out of LPCVD oxide and have been fabricated.

Paper Details

Date Published: 30 August 1999
PDF: 9 pages
Proc. SPIE 3874, Micromachining and Microfabrication Process Technology V, (30 August 1999); doi: 10.1117/12.361212
Show Author Affiliations
Bahram Ghodsian, Titan Corp. (United States)
Veljko Milanovic, Univ. of California/Berkeley (United States)
Orlando Villavicencio, Space and Naval Warfare Systems Ctr., San Diego (United States)

Published in SPIE Proceedings Vol. 3874:
Micromachining and Microfabrication Process Technology V
James H. Smith; Jean Michel Karam, Editor(s)

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