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Proceedings Paper

Deep discrete trenches filled by in-situ doped polysilicon: an alternative method for junction insulating box
Author(s): Fabien Pierre; Said Aachboun; Olivier Bonnaud; H. Lhermite; Pierre Ranson; Christine Anceau; L. Cornibert
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Paper Abstract

The aim of this study is to develop a new electrical insulating technique available for power devices and specific application devices. The classical process for the fabrication of insulating walls, consists in the diffusion of doping boron atoms from the surface of the wafer. An alternative way to perform this insulating structure is to create deep doping sources located in the region of the future insulating wall, to diffuse these doping atoms until the overlapping of the different diffusion zones and thus to achieve a continuous junction wall. These doping sources are realized by filling small adjacent deep trenches with doped material. This technique was applied on insulating boxes which were made by this way inside an n-type epitaxial layer grown on a p-type substrate. Trenches of 4 micrometers wide have been etched to a depth of approximately 50 micrometers by a high density low pressure helicon plasma reactor at an average rate of 5 micrometers /min. Process is based on an SF6/O2 mix as feed gas and a cryogenic chuck. Then these trenches are filled with in-situ boron doped polycrystalline silicon deposited by low pressure chemical vapor deposition technique using a gaseous mix of silane and diborane. The structures are then annealed in order to create a continuous wall between the adjacent filled trenches. These insulated boxes were electrically tested. The first results showed that it is possible to get a breakdown voltage higher than 200 Volts. This technique is thus promising.

Paper Details

Date Published: 1 September 1999
PDF: 7 pages
Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); doi: 10.1117/12.360559
Show Author Affiliations
Fabien Pierre, Univ. de Rennes I (France) and STMicroelectronics (France)
Said Aachboun, Univ. d'Orleans (France)
Olivier Bonnaud, Univ. de Rennes I (France)
H. Lhermite, Univ. de Rennes I (France)
Pierre Ranson, Univ. d'Orleans (France)
Christine Anceau, STMicroelectronics (France)
L. Cornibert, STMicroelectronics (France)

Published in SPIE Proceedings Vol. 3881:
Microelectronic Device Technology III
David Burnett; Toshiaki Tsuchiya, Editor(s)

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