In this paper the design aspect and fabrication issues of a GXGA reflective silicon light valve are discussed. Special attention is paid to the layout and architecture of the silicon backplane using submicron CMOS processing with a medium voltage extension. A careful layout yields a silicon backplane with an analog DRAM architecture with a pixel pitch of 15 micrometers , addressed by analog integrate drivers using a 16-fold parallelism. The investigated reflective TN and vertical aligned NLC technologies showed both an acceptable performance for application in high-end reflective light valves, although the vertical aligned NLC showed a slightly better contrast ratio and black state.

Date Published: 20 May 1999
PDF: 7 pages
Proc. SPIE 3634, Projection Displays V, (20 May 1999);

Published in SPIE Proceedings Vol. 3634:
Projection Displays V
Ming Hsien Wu, Editor(s)