
Proceedings Paper
Strategy and tools for yield enhancementFormat | Member Price | Non-Member Price |
---|---|---|
$17.00 | $21.00 |
Paper Abstract
We present an overview on yield enhancement in a semiconductor manufacturing environment. We discuss about the technical and strategic aspects of this field. On the technical side we deal with yield metrics definitions and yield analysis tools. The strategic side includes the work of quantifying and prioritize yield loss issues. Communication of yield to other organizations, that will be involved in the team work for the search of root cause identification and corrective and preventative action plans, is a key to a successful and sustained yield enhancement. The importance of moving from end-of-line yield enhancement standpoint to a more in-line view is also outlined.
Paper Details
Date Published: 27 April 1999
PDF: 8 pages
Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); doi: 10.1117/12.346905
Published in SPIE Proceedings Vol. 3743:
In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing
Kostas Amberiadis; Gudrun Kissinger; Katsuya Okumura; Seshu Pabbisetty; Larg H. Weiland, Editor(s)
PDF: 8 pages
Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); doi: 10.1117/12.346905
Show Author Affiliations
Miguel Recio, Lucent Technologies Microelectronica (Spain)
Published in SPIE Proceedings Vol. 3743:
In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing
Kostas Amberiadis; Gudrun Kissinger; Katsuya Okumura; Seshu Pabbisetty; Larg H. Weiland, Editor(s)
© SPIE. Terms of Use
