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Proceedings Paper

PN and SOI wafer flow process for stencil mask fabrication
Author(s): Joerg Butschke; Albrecht Ehrmann; Ernst Haugeneder; Mathias Irmscher; Rainer Kaesmaier; Karl Kragler; Florian Letzkus; Hans Loeschner; Josef Mathuni; Ivo W. Rangelow; Carsten Reuter; Feng Shi; Reinhard Springer
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Paper Abstract

Two process flows for the fabrication of stencil masks have been developed. The PN Wafer Flow- and the SOI Wafer Flow Process. Membranes and stencil masks out of different 6 inch Si base wafers with 3 micrometers membrane thickness and a membrane diameter between 120 mm and 126 mm were fabricated. The membrane stress depending on the material property and doping level has been determined. First metrology measurements have been carried out.

Paper Details

Date Published: 23 April 1999
PDF: 10 pages
Proc. SPIE 3665, 15th European Conference on Mask Technology for Integrated Circuits and Microcomponents '98, (23 April 1999); doi: 10.1117/12.346224
Show Author Affiliations
Joerg Butschke, Institut fuer Mikroelektronik/Stuttgart (Germany)
Albrecht Ehrmann, Siemens AG (Germany)
Ernst Haugeneder, Ionen Mikrofabrikations Systeme GmbH (Austria)
Mathias Irmscher, Institut fuer Mikroelektronik/Stuttgart (Germany)
Rainer Kaesmaier, Siemens AG (Germany)
Karl Kragler, Siemens AG (Germany)
Florian Letzkus, Institut fuer Mikroelektronik/Stuttgart (Germany)
Hans Loeschner, Ionen Mikrofabrikations Systeme GmbH (Austria)
Josef Mathuni, Siemans AG (Germany)
Ivo W. Rangelow, Univ. Kassel (Germany)
Carsten Reuter, Institut fuer Mikroelektronik/Stuttgart (Germany)
Feng Shi, Univ. Kassel (Germany)
Reinhard Springer, Institut fuer Mikroelektronik/Stuttgart (Germany)

Published in SPIE Proceedings Vol. 3665:
15th European Conference on Mask Technology for Integrated Circuits and Microcomponents '98
Uwe F. W. Behringer, Editor(s)

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