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Proceedings Paper

Fault simulation of MEMS using HDLs
Author(s): Benoit Charlot; Salvador Mir; Erika F. Cota; Marcelo Lubaszewski; Bernard Courtois
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Paper Abstract

This paper describes an approach to fault simulation of MEMS using an analog Hardware Description Language (HDL). HDL languages facilitate the description of mixed-domain devices, providing powerful representation capabilities which are not limited to the use of the traditional equivalent electrical modes. This is exploited in this paper for fault simulation of MEMS, showing the advantages of using an HDL for this task. An electro-thermal converter is used as test vehicle, for which an equivalent electrical more is readily obtained. Typical defects and failure mechanisms which can affect these devices fabricated using CMOS-compatible bulk micromachining are shown. These defects are used for illustrating the fault simulation approach which appears to be more comprehensive and systematic than previous approaches.

Paper Details

Date Published: 10 March 1999
PDF: 8 pages
Proc. SPIE 3680, Design, Test, and Microfabrication of MEMS and MOEMS, (10 March 1999); doi: 10.1117/12.341215
Show Author Affiliations
Benoit Charlot, TIMA (France)
Salvador Mir, TIMA (France)
Erika F. Cota, DELET/UFRGS (Brazil)
Marcelo Lubaszewski, DELET/UFRGS (Brazil)
Bernard Courtois, TIMA (France)

Published in SPIE Proceedings Vol. 3680:
Design, Test, and Microfabrication of MEMS and MOEMS
Bernard Courtois; Wolfgang Ehrfeld; Selden B. Crary; Wolfgang Ehrfeld; Hiroyuki Fujita; Jean Michel Karam; Karen W. Markus, Editor(s)

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