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Proceedings Paper

Media processing using streams
Author(s): Scott Rixner; William J. Dally; Ujval J. Kapasi; Brucek Khailany; Abelardo Lopez-Lagunas; Peter R. Mattson; John D. Owens
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Paper Abstract

Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are poorly matched to conventional microprocessor architectures, they are a good fit for modern VLSI technology with its high arithmetic capacity but limited global bandwidth. The stream programming model, in which an application is coded as streams of data records passing through computation kernels, exposes both parallelism and locality in media applications that can be exploited by VLSI architectures. The Imagine architecture supports the stream programming model by providing a bandwidth hierarchy tailored to the demands of media applications. Compared to a conventional scalar processor, Imagine reduces the global register and memory bandwidth required by typical applications by factors of 13 and 21 respectively. This bandwidth efficiency enables a single chip Imagine processor to achieve a peak performance of 16.2GFLOPS (single-precision floating point) and sustained performance of up to 8.5GFLOPS on media processing kernels.

Paper Details

Date Published: 21 December 1998
PDF: 13 pages
Proc. SPIE 3655, Media Processors 1999, (21 December 1998); doi: 10.1117/12.334767
Show Author Affiliations
Scott Rixner, Stanford Univ. (United States)
William J. Dally, Stanford Univ. (United States)
Ujval J. Kapasi, Stanford Univ. (United States)
Brucek Khailany, Stanford Univ. (United States)
Abelardo Lopez-Lagunas, Stanford Univ. (United States)
Peter R. Mattson, Stanford Univ. (United States)
John D. Owens, Stanford Univ. (United States)

Published in SPIE Proceedings Vol. 3655:
Media Processors 1999
Sethuraman Panchanathan; Subramania I. Sudharsanan; V. Michael Bove Jr., Editor(s)

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