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Proceedings Paper

Titanium silicide etching in sub-half-micron device technology
Author(s): Simon Y. M. Chooi; Vincent K.T. Sih; Soh Yun Siah; Zainab Ismail; Mei-Sheng Zhou
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Paper Abstract

The downscaling in ULSI devices incorporating self-aligned titanium silicide (salicide) has led to the high sheet resistance and junction leakage. Silicon implantation through metal (ITM) and pre-amorphization implantation (PAI) have been investigated to address the concerns. The selective wet chemical stripping of unreacted titanium and/or titanium nitride after salicide formation (salicide etchback) is an important process and is investigated in this paper on an off- axis spray processor. The etching rates of titanium and titanium nitride that were subjected to a rapid thermal annealing (RTA) are about half that of their non-RTA counterparts. The flow rate of the components in SC-1 is found to have the most impact on the etching rates of the titanium nitride and titanium silicide. The variation of the temperature and ratio of ammonium hydroxide, hydrogen peroxide and deionized water in SC-1 produced different etching selectivity of titanium nitride and titanium to silicon dioxide and titanium silicide. The graphical profile of the both salicidation schemes in the active and field regions correlates the distinct slope patterns to the etching of different film materials, and provides a qualitative assessment in the absence of analytical depth profiling. Electrical tests reveal similar gate-to-source drain leakage values for both PAI and ITM salicide schemes using the standard SC-1 cleaning.

Paper Details

Date Published: 4 September 1998
PDF: 11 pages
Proc. SPIE 3508, Multilevel Interconnect Technology II, (4 September 1998); doi: 10.1117/12.324027
Show Author Affiliations
Simon Y. M. Chooi, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Vincent K.T. Sih, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Soh Yun Siah, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Zainab Ismail, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Mei-Sheng Zhou, Chartered Semiconductor Manufacturing Ltd. (Singapore)

Published in SPIE Proceedings Vol. 3508:
Multilevel Interconnect Technology II
Mart Graef; Divyesh N. Patel, Editor(s)

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