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Proceedings Paper

CD control for quarter-micron logic device gates using iso-pitch bias
Author(s): Young-Chang Kim; Gisung Yeo; Hye-soo Shin; Hak Kim; Hoyoung Kang; U-In Chung
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Paper Abstract

The process optimization and optical proximity effect for 0.25 micrometer gates of logic device were studied to minimize line width variation. The total line width variation was found to be composed of optical proximity effect and process uniformity. Process optimization was preceded to minimize the contribution of process uniformity, and the quantitative analysis could be done by measuring some patterns that were intentionally chosen for evaluating the optical proximity effect and other factors. It was found that the line width variation due to optical proximity effect was closely related to mask bias through this quantitative analysis. Simulations and experimental results give an important conclusion that there is a special mask bias where the degree of optical proximity effect among the different pitched patterns could be nearly neglected under certain process condition. This new condition was defined as 'Iso-Pitch Bias' and applied to decrease the optical proximity effect. Finally, CD variation as small as 20 nm, was obtained at real logic device gate patterns with optimized condition.

Paper Details

Date Published: 29 June 1998
PDF: 11 pages
Proc. SPIE 3334, Optical Microlithography XI, (29 June 1998); doi: 10.1117/12.310793
Show Author Affiliations
Young-Chang Kim, Samsung Electronics Co., Ltd. (Belgium)
Gisung Yeo, Samsung Electronics Co., Ltd. (South Korea)
Hye-soo Shin, Samsung Electronics Co., Ltd. (South Korea)
Hak Kim, Samsung Electronics Co., Ltd. (South Korea)
Hoyoung Kang, Samsung Electronics Co., Ltd. (United States)
U-In Chung, Samsung Electronics Co., Ltd. (South Korea)

Published in SPIE Proceedings Vol. 3334:
Optical Microlithography XI
Luc Van den Hove, Editor(s)

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