Share Email Print

Proceedings Paper

Balancing electrical and optical interconnection resources at low levels
Author(s): Timothy J. Drabik
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Free-space optical interconnections within a single chip can slow of halt the growth in the number of metal levels required as gate count increases. Quantifying these benefits leads to interesting conclusions and questions.

Paper Details

Date Published: 22 May 1998
PDF: 4 pages
Proc. SPIE 3490, Optics in Computing '98, (22 May 1998); doi: 10.1117/12.308876
Show Author Affiliations
Timothy J. Drabik, Georgia Institute of Technology (United States)

Published in SPIE Proceedings Vol. 3490:
Optics in Computing '98
Pierre H. Chavel; David A. B. Miller; Hugo Thienpont, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?