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Proceedings Paper

New parallel multiplier design
Author(s): Amar Aggoun
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Paper Abstract

A new parallel multiplier design is proposed based on the technique of partitioning the operands into four groups however using different grouping and a combination of 4:2 compressor carry save adders for the accumulation of the 16 partial product terms. Also a design methodology of parallel multiplier is proposed which gives the designer more flexibility in finding the best trade off between the throughput rate and the hardware cost.

Paper Details

Date Published: 22 December 1997
PDF: 6 pages
Proc. SPIE 3217, Image Processing, Signal Processing, and Synthetic Aperture Radar for Remote Sensing, (22 December 1997); doi: 10.1117/12.295598
Show Author Affiliations
Amar Aggoun, De Montfort Univ. (United Kingdom)


Published in SPIE Proceedings Vol. 3217:
Image Processing, Signal Processing, and Synthetic Aperture Radar for Remote Sensing
Jacky Desachy; Shahram Tajbakhsh, Editor(s)

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