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Proceedings Paper

Current status of the British Aerospace resistor-array IR scene projector technology
Author(s): Alan P. Pritchard; Stephen Paul Lake; Mark D. Balmond; David W. Gough; Mark A. Venables; Ian M. Sturland; Graeme Neil Crisp; S. C. Watkin
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Paper Abstract

This paper describes the cumulative status-to-date, and current developments in the British Aerospace IR scene projector system technology in early 1997. The systems have been developed for Hardware-in-the-loop simulation in missile test and evaluation facilities. Historically, the technology has been called `Thermal Picture Synthesis' an early equivalent of what is now known as Infra-red Scene Projection. Earlier generations of system were based on a monolithic resistor-substrate construction, a modification of which is still used for ground target simulations (TPS3), whereas the more recent systems for air target simulations are based on fully suspended resistor designs (TPS4). These projector systems incorporating full scale arrays have been fabricated at up to 256 X 256 complexity. Research work is being carried out on high temperature arrays for air-to- air countermeasure simulations, and the first TPS5 full system at 512 X 512 complexity has completed its design stage and has recently moved into fabrication. Research testbed arrays of 768 X 768 have just been made, and 1024 X 1024 arrays are presently being fabricated. The paper includes an initial introduction to the basics of the technology, and is followed by a section on certain specialized features to combat inherent issues in the technology. Specifications and the current status of each category of device is then given.

Paper Details

Date Published: 15 July 1997
PDF: 7 pages
Proc. SPIE 3084, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing II, (15 July 1997); doi: 10.1117/12.280972
Show Author Affiliations
Alan P. Pritchard, British Aerospace PLC (United Kingdom)
Stephen Paul Lake, British Aerospace PLC (United Kingdom)
Mark D. Balmond, British Aerospace PLC (United Kingdom)
David W. Gough, British Aerospace PLC (United Kingdom)
Mark A. Venables, British Aerospace PLC (United Kingdom)
Ian M. Sturland, British Aerospace PLC (United Kingdom)
Graeme Neil Crisp, British Aerospace PLC (United Kingdom)
S. C. Watkin, British Aerospace PLC (United Kingdom)

Published in SPIE Proceedings Vol. 3084:
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing II
Robert Lee Murrer Jr., Editor(s)

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