Share Email Print

Proceedings Paper

Effect of argon or nitrogen preamorphized implant on SALICIDE formation for deep submicron CMOS technology
Author(s): Chaw Sing Ho; Kin Leong Pey; Harianto Wong; R. P. Gamani Karunasiri; Soo-Jin Chua; Kong Hean Lee; Ying Tang; Sang Min Wong; Lap Hung Chan
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

A Ti-SALICIDE process incorporating an argon or nitrogen- amorphization implantation prior to silicidation to enhance the C54-TiSi2 formation for deep submicron CMOS devices is presented. It was found that by incorporation a high- temperature titanium deposition at 400 degrees C together with argon-amorphization at a dosage of 3 X 1014 cm-2, excellent sheet (rho) was obtained for gate lengths down to 0.25 micrometers . The improvement seen using a lower temperature deposition was relatively less. We postulate that the higher deposition temperature ensures that the C54 phase is nucleated before the C49 phase forms large grains. No noticeable difference was observed for dosages ranging between 3 X 1014 cm-2 and 6 X 1014 cm-2 for the argon implant. In the case for nitrogen-amorphization, the improvement seen on the narrow polySi gate was also promising. The impact of dopants on silicidation was evaluated nd discussed. Drawbacks of this technique appear to manifest in the compromised integrity of the source/drain junctions, and higher gate-to- source drain leakages, as evident in the case of argon and nitrogen amorphization implants. The anomalous leakage behavior observed for both argon and nitrogen was however not evident in the case of the arsenic implant. Comparable performance to the SALICIDE process with no pre- amorphization with respect to the leakage parameters was achieved for the arsenic-amorphized wafers.

Paper Details

Date Published: 14 August 1997
PDF: 12 pages
Proc. SPIE 3183, Microlithographic Techniques in IC Fabrication, (14 August 1997); doi: 10.1117/12.280547
Show Author Affiliations
Chaw Sing Ho, National Univ. of Singapore (Singapore)
Kin Leong Pey, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Harianto Wong, Chartered Semiconductor Manufacturing Ltd. (Singapore)
R. P. Gamani Karunasiri, National Univ. of Singapore (Singapore)
Soo-Jin Chua, National Univ. of Singapore (Singapore)
Kong Hean Lee, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Ying Tang, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Sang Min Wong, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Lap Hung Chan, Chartered Semiconductor Manufacturing Ltd. (Singapore)

Published in SPIE Proceedings Vol. 3183:
Microlithographic Techniques in IC Fabrication
Soon Fatt Yoon; Raymond Yu; Chris A. Mack, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?