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Proceedings Paper

New process for nanometer-scale devices
Author(s): Yifang Chen; P. Hadley; C. J. P. M. Harmans; J. E. Mooij; Geok Ing Ng; Soon Fatt Yoon
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Paper Abstract

A new process employing e-beam lithography and a self- aligned tow angle shadow evaporation has been developed to fabricate 10 nm tunnel junctions and split leads with gaps of 2-5 nm. The fabricated Al/AlxO/Al tunnel junctions on a SiO2/Si substrate had a capacitance of 20 aF. These tunnel junctions were incorporated in single electron tunneling circuits where the small capacitance is essential. Single electron tunneling transistors with threshold voltages of 3 mV were fabricated using this process. The object of closely spaced leads was to contact individual molecules for electrical characterizations. Further improvements of this process for a triple angle shadow evaporation will be discussed.

Paper Details

Date Published: 14 August 1997
PDF: 8 pages
Proc. SPIE 3183, Microlithographic Techniques in IC Fabrication, (14 August 1997); doi: 10.1117/12.280534
Show Author Affiliations
Yifang Chen, Delft Univ. of Technology (Netherlands) and Nanyang Technological Univ. (Singapore)
P. Hadley, Delft Univ. of Technology (Netherlands)
C. J. P. M. Harmans, Delft Univ. of Technology (Netherlands)
J. E. Mooij, Delft Univ. of Technology (Netherlands)
Geok Ing Ng, Nanyang Technological Univ. (Singapore)
Soon Fatt Yoon, Nanyang Technological Univ. (Singapore)

Published in SPIE Proceedings Vol. 3183:
Microlithographic Techniques in IC Fabrication
Soon Fatt Yoon; Raymond Yu; Chris A. Mack, Editor(s)

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