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Fabrication process of superconducting integrated circuits with submicron Nb/AlOx/Nb junctions using electron-beam direct writing technique
Author(s): Masahiro Aoyagi; Hiroshi Nakagawa
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Paper Abstract

For enhancing operating speed of a superconducting integrated circuit (IC), the device size must be reduced into the submicron level. For this purpose, we have introduced electron beam (EB) direct writing technique into the fabrication process of a Nb/AlOx/Nb Josephson IC. A two-layer (PMMA/(alpha) M-CMS) resist method called the portable conformable mask (PCM) method was utilized for having a high aspect ratio. The electron cyclotron resonance (ECR) plasma etching technique was utilized. We have fabricated micron or submicron-size Nb/AlOx/Nb Josephson junctions, where the size of the junction was varied from 2 micrometer to 0.5 micrometer at 0.1 micrometer intervals. These junctions were designed for evaluating the spread of the junction critical current. We achieved minimum-to-maximum Ic spread of plus or minus 13% for 0.81-micrometer-square (plus or minus 16% for 0.67-micrometer-square) 100 junctions spreading in 130- micrometer-square area. The size deviation of 0.05 micrometer was estimated from the spread values. We have successfully demonstrated a small-scale logic IC with 0.9-micrometer-square junctions having a 50 4JL OR-gate chain, where 4JL means four junctions logic family. The circuit was designed for measuring the gate delay. We obtained a preliminary result of the OR- gate logic delay, where the minimum delay was 8.6 ps/gate.

Paper Details

Date Published: 7 July 1997
PDF: 8 pages
Proc. SPIE 3048, Emerging Lithographic Technologies, (7 July 1997); doi: 10.1117/12.275805
Show Author Affiliations
Masahiro Aoyagi, Electrotechnical Lab. (Japan)
Hiroshi Nakagawa, Electrotechnical Lab. (Japan)

Published in SPIE Proceedings Vol. 3048:
Emerging Lithographic Technologies
David E. Seeger, Editor(s)

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