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Proceedings Paper

Achieving subhalf-micron I-line manufacturability through automated OPC
Author(s): Mario S. Garza; Eric Jackson; Wayne P. Shen; Nicholas K. Eib; Saeed Sabouri; Uwe Hollerbach; Theron L. Felmlee; Vijaya N.V. Raghavan; K. C. Wang; Eytan Barouch; Steven A. Orszag; Keith K. Chao; John Jensen
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Paper Abstract

We present results of a verification study of totally automated optical proximity correction (OPC) for mask redesign to enhance process capability. OPC was performed on an aggressive 0.35 micrometer i-line LSI logic SRAM design using the automated OPC generation code Eoptimask, employing the aerial image simulation code FAIM, both from Vector Technologies, Inc. Three different tests were performed, varying in the aggressiveness and type of corrections made. The key issues addressed in this work are the predictive capability of the aerial image simulation and, particularly, the ability of automatically generated OPC to significantly improve the fidelity of the final printed resist image for different geometries. The results of our study clearly demonstrate the utility of automated OPC based on aerial image simulation. Key experimental results include: two-fold increase of depth of focus latitude; demonstration of the feasibility of full off-axis illumination on the stepper; successful resolution of different feature types (posts, lines and spaces) on the wafer to correct CD at a single common exposure and focus condition. Future research will address detailed issues in reticle manufacture and inspection which are critical for cost-effective large-scale OPC.

Paper Details

Date Published: 7 July 1997
PDF: 14 pages
Proc. SPIE 3048, Emerging Lithographic Technologies, (7 July 1997); doi: 10.1117/12.275804
Show Author Affiliations
Mario S. Garza, LSI Logic (United States)
Eric Jackson, CHI (United States)
Wayne P. Shen, Hewlett-Packard Co. (United States)
Nicholas K. Eib, LSI Logic (United States)
Saeed Sabouri, Hewlett-Packard Co. (United States)
Uwe Hollerbach, Boston Univ. (United States)
Theron L. Felmlee, Hewlett-Packard Co. (United States)
Vijaya N.V. Raghavan, Hewlett-Packard Co. (United States)
K. C. Wang, Hewlett-Packard Co. (United States)
Eytan Barouch, Boston Univ. (United States)
Steven A. Orszag, Boston Univ. and Princeton Univ. (United States)
Keith K. Chao, LSI Logic (United States)
John Jensen, LSI Logic (United States)

Published in SPIE Proceedings Vol. 3048:
Emerging Lithographic Technologies
David E. Seeger, Editor(s)

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