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Proceedings Paper

Gated four-probe TFT structure: a new technique to measure the intrinsic performance of a-Si:H TFT
Author(s): Chun-Ying Chen; Jerzy Kanicki
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Paper Abstract

A new technique to determine the intrinsic performance of hydrogenated amorphous silicon thin film transistor (TFT) without any influence from source/drain series resistances is proposed. This technique is based on a-Si:H gated-four- probe (GFP) TFT structure. In this method, two probes within the channel of a conventional inverted-staggered a-Si:H TFT are used to measured the voltage difference. By correlating this voltage difference with the drain-source current induced by applied gate bias, the intrinsic performance of a-Si:H TFT, such as mobility, threshold voltage and field- effect conductance activation energy, can be accurately determined without influence from the source/drain series resistances. The a-Si:H GFP TFT and conventional a-Si:H TFT structures are also analyzed and their properties are compared by using 2D simulation based on finite element method. The influence of series resistances on a-Si:H TFT electrical performance is clearly described from the simulation results.

Paper Details

Date Published: 10 April 1997
PDF: 8 pages
Proc. SPIE 3014, Active Matrix Liquid Crystal Displays Technology and Applications, (10 April 1997); doi: 10.1117/12.270279
Show Author Affiliations
Chun-Ying Chen, Univ. of Michigan (United States)
Jerzy Kanicki, Univ. of Michigan (United States)

Published in SPIE Proceedings Vol. 3014:
Active Matrix Liquid Crystal Displays Technology and Applications
Tolis Voutsas; Tsu-Jae King, Editor(s)

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