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Proceedings Paper

Implemenation of a color edge detection operator in FPGA architecture
Author(s): Hassane Guermoud; Serge Weber; Yves Berviller; Etienne Tisserand
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Paper Abstract

In this article we present the study of a color edge extractor operator. We make an evaluation of the costs in terms of die size and latency time in the case of an implementation in F.P.G.A. This makes it possible to operate at 25 images/second and thus satisfy a lot of industrial applications.

Paper Details

Date Published: 7 February 1997
PDF: 7 pages
Proc. SPIE 2949, Imaging Sciences and Display Technologies, (7 February 1997); doi: 10.1117/12.266350
Show Author Affiliations
Hassane Guermoud, Univ. Henri Poincare--Nancy I (France)
Serge Weber, Univ. Henri Poincare--Nancy I (France)
Yves Berviller, Univ. Henri Poincare--Nancy I (France)
Etienne Tisserand, Univ. Henri Poincare--Nancy I (France)

Published in SPIE Proceedings Vol. 2949:
Imaging Sciences and Display Technologies
Jan Bares; Christopher T. Bartlett; Paul A. Delabastita; Jose Luis Encarnacao; Nelson V. Tabiryan; Panos E. Trahanias; Arthur Robert Weeks, Editor(s)

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