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Proceedings Paper

Low-power highly miniaturized image sensor technology
Author(s): Karmak Mansoorian; Eric R. Fossum
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Paper Abstract

A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory with performance comparable to charge-coupled device (CCDs). This sensor is implemented using the industry-standard complementary metal-oxide semiconductor (CMOS) technology employed for nearly all microprocessors and memory chips and thus takes advantage of the rapid worldwide development of this technology. The CMOS active pixel sensor (APS) maintains the performance of CCDs regarding noise and quantum efficiency and offers unique advantages for ultra low power focal plane operation and integration of supporting electronics such as timing, control, clock, signal chains and analog-to-digital converters. This paper describes the technology for implementing a low power camera-on-a-chip.

Paper Details

Date Published: 6 January 1997
PDF: 7 pages
Proc. SPIE 2933, Terrorism and Counter-Terrorism Methods and Technologies, (6 January 1997); doi: 10.1117/12.263135
Show Author Affiliations
Karmak Mansoorian, Photobit LLC (United States)
Eric R. Fossum, Photobit LLC (United States)

Published in SPIE Proceedings Vol. 2933:
Terrorism and Counter-Terrorism Methods and Technologies
Wade Ishimoto, Editor(s)

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