This paper describes an application in high-performance signal processing using reconfigurable computing engines. The application is a 250 MHz cross-correlator for radio astronomy and was developed using the fastest available Xilinx FPGAs. We report experimental results on the operation of reconfigurable computers at 250 MHz, and describe the architectural innovations required to build a 250 MHz reconfigurable computer. Extensions of the technique to a variety of high-performance real-time signal processing algorithms are discussed.

Date Published: 21 October 1996
PDF: 10 pages
Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); doi: 10.1117/12.255833

Published in SPIE Proceedings Vol. 2914:
High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
John Schewel; Peter M. Athanas; V. Michael Bove Jr.; John Watson, Editor(s)