Share Email Print

Proceedings Paper

Embedding large multidimensional DSP computations in reconfigurable logic
Author(s): Ayman Elnaggar; Hussein M. Alnuweiri; Mabo Robert Ito
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

Paper Details

Date Published: 21 October 1996
PDF: 8 pages
Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996);
Show Author Affiliations
Ayman Elnaggar, Univ. of British Columbia (Canada)
Hussein M. Alnuweiri, Univ. of British Columbia (Canada)
Mabo Robert Ito, Univ. of British Columbia (Canada)

Published in SPIE Proceedings Vol. 2914:
High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
John Schewel; Peter M. Athanas; V. Michael Bove Jr.; John Watson, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?