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Proceedings Paper

Design of large-array CMOS real-time imaging system based on FPGA
Author(s): Ting Zhang; Feihong Yu
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Paper Abstract

In general, the image processing part is placed on the personal computer (PC) for processing. However, with the amount of data to be processed increases dramatically, the requirement for data processing speed is increasing. Further, a real-time imaging system using Field-Programmable Gate Array (FPGA) is implemented, which is designed for a large-array CMOS camera based on USB3.0 interface. Given the advantages of FPGA parallel processing, this design will implement sensor image processing pipeline (IPP) with the FPGA. At the same time, the high speed storage device double data rate (DDR3) is used in the system to cache image data. A Xilinx FPGA is the core processing unit of the entire system, and it completes all the functional modules, including the CMOS driving, data transmission, real-time image stitching and image caching. FPGA-based IPP and DDR3 frame buffer application can improve the video frame rate. Finally, the imaging experimental results show that the large-array CMOS real-time imaging system has a display resolution of 7920*5432 with a stable frame rate of 8.5 fps, and achieves a good balance between speed and efficiency.

Paper Details

Date Published: 12 March 2020
PDF: 8 pages
Proc. SPIE 11438, 2019 International Conference on Optical Instruments and Technology: Optoelectronic Imaging/Spectroscopy and Signal Processing Technology, 1143815 (12 March 2020); doi: 10.1117/12.2555145
Show Author Affiliations
Ting Zhang, Zhejiang Univ. (China)
Feihong Yu, Zhejiang Univ. (China)


Published in SPIE Proceedings Vol. 11438:
2019 International Conference on Optical Instruments and Technology: Optoelectronic Imaging/Spectroscopy and Signal Processing Technology
Guohai Situ; Xun Cao; Wolfgang Osten, Editor(s)

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