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Proceedings Paper

Implementing Machine Learning OPC on product layouts
Author(s): Hesham Abdelghany; Kevin Hooker; Marco Guajardo; Chia-Chun Lu
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Paper Abstract

As feature resolution and process variations continue to shrink for new nodes of both DUV and EUV lithography, the density and number of devices on advanced semiconductor masks continue to increase rapidly. These advances cause significantly increased pressure on the accuracy and efficiency of OPC and assist feature (AF) optimization methods for each subsequent process technology. Several publications and industry presentations have discussed the use of neural networks or other machine learning techniques to provide improvements in efficiency for OPC main feature optimization or AF placement. In this paper, we present results of a method for using machine-learning to predict OPC mask segment displacements. We will review several detailed examples showing the accuracy and overall OPC TAT benefits of our method for advanced node manufacturing test cases. We will also discuss the experiments testing the amount and diversity of training data required to achieve true production level OPC stability.

Paper Details

Date Published: 26 March 2020
PDF: 9 pages
Proc. SPIE 11328, Design-Process-Technology Co-optimization for Manufacturability XIV, 1132805 (26 March 2020); doi: 10.1117/12.2552398
Show Author Affiliations
Hesham Abdelghany, Synopsys, Inc. (United States)
Kevin Hooker, Synopsys, Inc. (United States)
Marco Guajardo, Synopsys, Inc. (United States)
Chia-Chun Lu, Synopsys Taiwan Co., Ltd. (Taiwan)

Published in SPIE Proceedings Vol. 11328:
Design-Process-Technology Co-optimization for Manufacturability XIV
Chi-Min Yuan, Editor(s)

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