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Proceedings Paper

Accurate etch modeling with massive metrology and deep-learning technology
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Paper Abstract

The semiconductor design node shrinking requires tighter edge placement errors (EPE) budget. OPC error, as one major contributor of EPE budget, need to be reduced with better OPC model accuracy. In addition, the CD (Critical Dimension) shrinkage in advanced node heavily relies on the etch process. Therefore AEI (After Etch Inspection) metrology and modeling are important to provide accurate pattern correction and optimization. For nodes under 14nm, the etch bias (i.e. the bias between ADI (After Development Inspection) CD and AEI CD) could be -10 nm ~ -50 nm, with a strong loading and aspect-ratio dependency. Etch behavior in advanced node is very complicated and brings challenges to conventional rule based OPC correction. Therefore, accurate etch modeling becomes more and more important to make precise prediction of final complex shapes on wafer for OPC correction. In order to ensure the accuracy of etch modeling, high quality metrology is necessary to reduce random error and systematic measurement error. Moreover, CD gauges alone are not sufficient to capture all the effects of the etch process on different patterns. Edge placement (EP) gauges that accurately describe the contour shapes at various key positions are needed. In this work we used the AEI SEM images obtained from traditional CD-SEM flow, processed with ASML’s MXP (Metrology for eXtreme Performance) tool, and used the extracted CD gauges and massive EP gauges to train a deeplearning Newron Etch model. In the approach, MXP reduced the AEI metrology random errors and shape fitting measurement error and provides better pattern coverage with massive reliable CD and EP gauges, Newron Etch captures complex and unknown physical and chemical effects learned from wafer data. Results shows that MXP successfully extracted stable contour from AEI SEM for various pattern types. Three etch models are calibrated and compared: CD based EEB model (Effective Etch Bias), CD+EP based EEB model, and CD+EP based Newron etch model. CD based EEB model captures the major trend of the etch process. Including EP gauges helps EEB model with about 10% RMS reduction on prediction. Integration of MXP (CD+EP) and Newron Etch model gains about 45% prediction RMS reduction compared to baseline model. The good prediction of Newron Etch is also verified from wafer SEM overlay on complex-shape patterns. This result validates the effectiveness of ASML’s solution of deep learning etch model integration with MXP AEI’s massive wafer data extraction from etch process, and will help to provide accurate and reliable etch modeling for advanced node etch OPC correction in semiconductor manufacturing.

Paper Details

Date Published: 23 March 2020
PDF: 11 pages
Proc. SPIE 11327, Optical Microlithography XXXIII, 113270B (23 March 2020); doi: 10.1117/12.2552001
Show Author Affiliations
Yifei Lu, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Yuhang Zhao, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Ming Li, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Wei Yuan, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Xiang Peng, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Hongmei Hu, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Shuxin Yao, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Zhunhua Liu, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Yu Tian, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Ying Gao, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Bingyang Pan, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Weijun Wang, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Chunyan Yi, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Jinze Wang, Brion Technologies (Shenzhen) Co., Ltd. (China)
Qian Xie, Brion Technologies (Shenzhen) Co., Ltd. (China)
Xichen Sheng, Brion Technologies (Shenzhen) Co., Ltd. (China)
Ying-chen Wu, Brion Technologies (Shenzhen) Co., Ltd. (China)
Guanyong Yan, Brion Technologies (Shenzhen) Co., Ltd. (China)
Yanjun Xiao, Brion Technologies (Shenzhen) Co., Ltd. (China)
Liang Liu, Brion Technologies (Shenzhen) Co., Ltd. (China)
Liang Ji, Brion Technologies (Shenzhen) Co., Ltd. (China)
Qian Zhao, ASML Silicon Valley (United States)
Yongfa Fan, ASML Silicon Valley (United States)
Yiqiong Zhao, ASML Silicon Valley (United States)
Mu Feng, ASML Silicon Valley (United States)
Yueliang Yao, Brion Technologies (Shenzhen) Co., Ltd. (China)
Terrance Yang, ASML Silicon Valley (United States)
Jun Lang, ASML Silicon Valley (United States)


Published in SPIE Proceedings Vol. 11327:
Optical Microlithography XXXIII
Soichi Owa, Editor(s)

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