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Proceedings Paper

Lithography today: challenges and solutions across a diverse market
Author(s): Kazunori Iwamoto
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Paper Abstract

In 1970, Canon introduced its PLA mask aligner tool for the patterning of features on the order of 10 microns. Wafer sizes at the time were on the order of 50 to 75 mm, and circuitry was relatively simple. Since this time, the device landscape and pattern requirements have changed significantly over the last 50 years as has the markets that are served. Sensors and power devices are still made on relatively small wafers, while the integrated circuit manufacturing has standardized largely on 300mm wafers at various resolutions depending on devices or packaging. Displays are manufactured on much larger glass substrates with higher resolution mobile displays on Gen 6 substrates with large television displays up to Gen 10 which are several meters square. Canon has focused on providing a wide range of lithography equipment to cover the complete needs of our customers. From launching the first proximity mask aligners in 1970, in accordance with Moore's law, the lithography equipment has evolved in order to increase the degree of integration of semiconductor devices and reduce the critical dimensions of the devices. As for flat panel display lithography equipment, a mirror projection exposure tool, the MPA was introduced in the early 1980s. In recent years, i-line lithography equipment has been used for advanced packaging, specifically Fan Out Wafer Level Packaging interposers due to the demand for ultra-dense packaging for smartphones and wearables. Most recently Canon has developed a nanoimprint solution for the patterning of advanced memory devices. Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. In this paper we review the Canon product line and describe how it is being used to address semiconductor patterning, packaging and flat panel display manufacturing.

Paper Details

Date Published: 23 March 2020
PDF: 12 pages
Proc. SPIE 11324, Novel Patterning Technologies for Semiconductors, MEMS/NEMS and MOEMS 2020, 1132405 (23 March 2020); doi: 10.1117/12.2551815
Show Author Affiliations
Kazunori Iwamoto, Canon Inc. (Japan)

Published in SPIE Proceedings Vol. 11324:
Novel Patterning Technologies for Semiconductors, MEMS/NEMS and MOEMS 2020
Martha I. Sanchez; Eric M. Panning, Editor(s)

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