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Proceedings Paper

Comparison of three monolithically integrated TIA topologies for 50 Gb/s OOK and PAM4
Author(s): Hector Andrade; Aaron Maharry; Takako Hirokawa; Luis Valenzuela; Stefan Simon; Clint L. Schow; James F. Buckwalter
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Paper Abstract

Parasitics such as wirebond inductances and bond pad capacitances that result from hybrid opto-electronic integration pose a challenge towards achieving data rates beyond 50 Gb/s. The effect of bond pad capacitance on the receiver transimpedance limit is shown, which demonstrates the significant advantage of monolithic versus hybrid integration. An analysis of three receiver topologies is presented. These all employ the same Cherry-Hooper voltage amplifier for the core electronics. A comparison across several design metrics of the three Transimpedance amplifier (TIA) variants is then provided. The TIAs are implemented monolithically in the IHP 250-nm SiGe BiCMOS EPIC process (fT = 190 GHz). Measurement results are then presented for 50 Gb/s OOK. PAM4 simulations are also shown.

Paper Details

Date Published: 28 February 2020
PDF: 8 pages
Proc. SPIE 11286, Optical Interconnects XX, 112860W (28 February 2020); doi: 10.1117/12.2548762
Show Author Affiliations
Hector Andrade, Univ. of California, Santa Barbara (United States)
Aaron Maharry, Univ. of California, Santa Barbara (United States)
Takako Hirokawa, Univ. of California, Santa Barbara (United States)
Luis Valenzuela, Univ. of California, Santa Barbara (United States)
Stefan Simon, IHP Microelectronics, Leibniz-Institut (Germany)
Clint L. Schow, Univ. of California, Santa Barbara (United States)
James F. Buckwalter, Univ. of California, Santa Barbara (United States)


Published in SPIE Proceedings Vol. 11286:
Optical Interconnects XX
Henning Schröder; Ray T. Chen, Editor(s)

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