A CMOS compatible three-dimensional (3D) integrated photonics circuit for multilayer silicon photonics is reported. Slopes with angles between 10o and 15° were created in the oxide layer using single step wet etching to connect the two Si waveguide layers. Amorphous Si (a-Si) deposited using hot wire chemical vapor deposition (HWCVD) at a temperature of 230°C was used to fabricate the device. Losses of 0.5 dB/slope were measured in the slope waveguides at 1310 nm wavelength. As a demonstration, we propose a 4x4 network switch using a-Si based vertical directional coupler.

Date Published: 30 December 2019
PDF: 2 pages
Proc. SPIE 11200, AOS Australian Conference on Optical Fibre Technology (ACOFT) and Australian Conference on Optics, Lasers, and Spectroscopy (ACOLS) 2019, 112001W (30 December 2019); doi: 10.1117/12.2542213

Published in SPIE Proceedings Vol. 11200:
AOS Australian Conference on Optical Fibre Technology (ACOFT) and Australian Conference on Optics, Lasers, and Spectroscopy (ACOLS) 2019
Arnan Mitchell; Halina Rubinsztein-Dunlop, Editor(s)