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Proceedings Paper

Practical lithography hotspot identification using mask process model
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Paper Abstract

Design weak points, or “hotspots” remain a leading issue in advanced lithography. These often lead to unexpected critical dimension (CD) behavior, degradation of process window and ultimately impact wafer yield. Industry technology development focus on hotspot detection has included full chip lithography simulation and machine learning-based hotspot analysis. Most recently, the machine learning approach is gaining attention because it is faster and more practical than lithography simulation-based hotspot detection. The machine learning case is a feedback approach based on previous known design hotspots. Conversely, the simulation method has the benefit of proactively detecting hotspots in a new design regardless of historical data. However, full chip simulation requires resources in calculating time, computing power and additional time-to-market that render it impractical in some scenarios. As design rules shrink, advanced mask designs have significantly increased in complexity due to Resolution Enhancement Techniques (RET) such as Source Mask Optimization (SMO), advanced Optical Proximity Correction (OPC) and high transmission attenuating mask films. This complicates hotspot detection by existing OPC verification tools or rigorous lithographic simulation with wafer resist model. These resultant complex mask geometries make OPC optimization and hotspot detection using post design very difficult. In this paper, we will demonstrate the limitation of traditional hotspot detection technology. Typical OPC tools use simple techniques such as single Gaussian approximations on the design, such as corner rounding, to take the mask process impact to the geometry into account. We will introduce a practical lithography hotspot identification method using mask process model. Mask model-based hotspot detection will be used to precisely identify lithography hotspots and will provide the information needed to improve hotspots’ lithographic performance.

Paper Details

Date Published: 26 September 2019
PDF: 11 pages
Proc. SPIE 11148, Photomask Technology 2019, 111481H (26 September 2019); doi: 10.1117/12.2537935
Show Author Affiliations
Pai Chi Chen, United Microelectronics Corp. (Taiwan)
Chain Ting Huang, United Microelectronics Corp. (Taiwan)
Shang Feng Weng, United Microelectronics Corp. (Taiwan)
Yung Feng Cheng, United Microelectronics Corp. (Taiwan)
Young Ham, Photronics, Inc. (United States)
Colbert Lu, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Michael Green, Photronics, Inc. (United States)
Mohamed Ramadan, Photronics, Inc. (United States)
Hong Jen Lee, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Chris Progler, Photronics, Inc. (United States)


Published in SPIE Proceedings Vol. 11148:
Photomask Technology 2019
Jed H. Rankin; Moshe E. Preil, Editor(s)

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