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A fast DFM-driven standard cell qualification approach for critical layers of 14nm technology node
Author(s): Xiaojing Su; Rui Chen; Yayi Wei; Yajuan Su; Lisong Dong
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Paper Abstract

Standard cell library is the basic for building blocks and SoC (system on chip). And design in current standard cell library always meets the most critical design rule, leading to tight lithography process window and hotspots easily. Besides, passing design rule check (DRC) cannot fully guarantee manufacturability. Lithography simulation check is an essential check item before tape out. It is significant to qualify the standard cell library at the most possible early stage in order to avoid design rework during the tape-out stage. For 14nm technology and below, hotspots appear both inside cell, abut regions of standard cells and pins for routing. Therefore, our paper puts forward a fast DFM-driven standard cell qualification approach to detect the hotspots inside cell and the potential defects from special kinds of pins and abutting standard cells. It can discover problems early and set constraints for placement and routing as early as possible for a fast product yield ramp-up.

Paper Details

Date Published: 26 September 2019
PDF: 9 pages
Proc. SPIE 11148, Photomask Technology 2019, 1114818 (26 September 2019); doi: 10.1117/12.2536626
Show Author Affiliations
Xiaojing Su, Institute of Microelectronics (China)
Univ. of Chinese Academy of Sciences (China)
Rui Chen, Institute of Microelectronics (China)
Yayi Wei, Institute of Microelectronics (China)
Univ. of Chinese Academy of Sciences (China)
Yajuan Su, Institute of Microelectronics (China)
Lisong Dong, Institute of Microelectronics (China)


Published in SPIE Proceedings Vol. 11148:
Photomask Technology 2019
Jed H. Rankin; Moshe E. Preil, Editor(s)

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