The ability to further shrink EUVL geometries can be facilitated using multiple lithographic approaches. Most recent proposals suggest an EUVL double patterning strategy. This path requires additional and expensive EUVL tool time. In our work, using an EUVL patterned polymer as a guide material with DSA incorporated into the lithography flow is an optional process mitigating EUVL tool time. Multiple variations of BCP (block copolymers) were successfully tested. In addition, pattern transfer through silicon containing hard mask and spin on carbon layers was demonstrated with minimum LER (line edge roughness) and good critical dimension uniformity (CDU).

Date Published: 3 June 2019
PDF: 8 pages
Proc. SPIE 10958, Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019, 1095812 (3 June 2019); doi: 10.1117/12.2518122

Published in SPIE Proceedings Vol. 10958:
Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019
Martha I. Sanchez; Eric M. Panning, Editor(s)