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Enhanced wafer overlay residuals control; deep sub-nanometer at sub-millimeter lateral resolution
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Paper Abstract

The introduction of advanced technology nodes in deep UV (DUV) lithography (litho), involving multiple litho steps, has tightened the wafer on-product overlay specifications [1]. The industry trend already pushes the overlay requirements to the sub-nanometer regime (and so the mask registration requirements tightens as well). In the most general view, wafer on-product overlay errors are a combination of intra-field (within field) and inter-field (field-to-field) errors. A given litho layer intra-field overlay error includes several systematic sources, such as scanner lens-to-lens residuals and mask writer residuals. Parallel to the nodes and litho techniques advancing, the ability to accurately measure overlay at high lateral resolution have being successfully introduced, both at wafer and mask side.

The recent developments in scanner technology improved the ability to control intra-field overlay at high-order across the exposure field. However, this is still in several millimeter lateral resolution control ability at its best, leaving residual errors in the sub-millimeter to few millimeter regime without the ability to further suppress them to the target specification, nevertheless, not to the sub-nanometer magnitude.

In this work, we have empirically evaluated the ZEISS state-of-the-art mask tuning solution named ForTune ERC (Enhanced Registration Control). This solution is based on laser processing of the mask bulk by the ZEISS ForTune tool. It allows to suppress few nanometer overlay residuals (post the scanner best-can-do) down to deep sub-nanometer, all even at sub-millimeter sampling resolution (x1 wafer level) and low-to-high residuals modulating frequency.

For the sake of this study, we have used a dual-image mask to form one overlay signature at wafer side. Two wafers have been exposed prior to the laser-based tuning of the mask bulk; the wafers overlay error was measured and used as an initial overlay problem to begin with. A second exposure of two additional wafers was performed post the problem-solving by the ERC model and the consequent mask laser-based tuning. The pre/post wafers were then compared to examine the improvement in overlay at wafer side. CD uniformity (CDU) data has been collected as well, to confirm no degradation in CDU due to the ForTune ERC process.

The combination of this advanced method of intra-field control with high-order correction per exposure (CPE) by the scanner, provides an efficient co-optimized solution to tightly control the overlay of existing and future nodes at DUV litho.

Paper Details

Date Published: 26 March 2019
PDF: 9 pages
Proc. SPIE 10959, Metrology, Inspection, and Process Control for Microlithography XXXIII, 109592K (26 March 2019); doi: 10.1117/12.2516362
Show Author Affiliations
Avi Cohen, Carl Zeiss SMT GmbH (Israel)
Philippe Leray, IMEC (Belgium)
Eren Canga, IMEC (Belgium)
Vladimir Dmitriev, Carl Zeiss SMT GmbH (Israel)
Kujan Gorhad, Carl Zeiss SMT GmbH (Israel)
Yael Sufrin, Carl Zeiss SMT GmbH (Israel)

Published in SPIE Proceedings Vol. 10959:
Metrology, Inspection, and Process Control for Microlithography XXXIII
Vladimir A. Ukraintsev; Ofer Adan, Editor(s)

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