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Proceedings Paper

Incorporating process variation contours in design rule calculation and SRAM design optimization
Author(s): Dongbing Shao; Jing Sha; Jinning Liu; Robert Wong
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Paper Abstract

At the early stage of a new technology development, Ground Rule (GR) calculations are performed assuming design targets are met, and all the process variations are within certain process assumptions. However, as technology matures, it is expensive, and time consuming to verify these assumptions for all the designs allowed by the rules. Thus, there’s a loop hole in the GRs if these assumptions are not met on the design. This issue becomes even worse for 2D dense design such as SRAM, where the design target and wafer image are so different due to all the corners, jogs, line ends etc, and the process variations are much larger for the 2D designs. As a result, SRAM designs almost never follow a standard GR approach but its own unique rules. In fact, for SRAM designs of slightly different style, the rules will be significantly different. On the other hand, Process Variation (PV) contours offer much more details of process variations even though their usage is very limited. One reason for that is that off-nominal conditions having larger risks from rule point of view but have lower probability at the same time, making it a dilemma for us. In this talk we propose a method to incorporate PV contours in GR calculation, and each PV contour are used in Monte-Carlo calculation in accordance with its own probability. We apply this method in SRAM layout optimization as an example. This work was performed at the IBM Semiconductor Research Center, Albany NY 12203

Paper Details

Date Published: 20 March 2019
PDF: 7 pages
Proc. SPIE 10962, Design-Process-Technology Co-optimization for Manufacturability XIII, 109620Y (20 March 2019); doi: 10.1117/12.2515636
Show Author Affiliations
Dongbing Shao, IBM Corp. (United States)
Jing Sha, IBM Corp. (United States)
Jinning Liu, IBM Corp. (United States)
Robert Wong, IBM Corp. (United States)

Published in SPIE Proceedings Vol. 10962:
Design-Process-Technology Co-optimization for Manufacturability XIII
Jason P. Cain, Editor(s)

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