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Proceedings Paper

Optimal feature vector design for computational lithography
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Paper Abstract

With semiconductor technology progressing beyond 5nm node, there is tremendous pressure on computational lithography to achieve both accuracy and speed. One very promising technique to accomplish this mission is to take full advantage of the maturing machine learning techniques based on neural network architecture. Some success has been achieved using convolution neural network (CNN) to obtain inverse lithography technology (ILT) solution with significantly less computational time. In general, CNN architecture consists of feature extraction layers and nonlinear mapping function construction layers. To train a CNN model requires a large amount of data and computational resource. To maintain certain intrinsic symmetries of imaging behavior, the feature extraction layers must be carefully engineered using weight sharing techniques or using well balanced training samples of different orientations, otherwise, feature extraction part will be skewed. It is therefore very desired to have a scheme that can obtain optimal feature vector for machine learning based computational lithography automatically without the need of feature extraction layers in CNN. In this paper, we will make an attempt to describe such a scheme and present our test results on machine learning based OPC and ILT solution. It should be understood that machine learning based computational lithography solutions do not possess the capability to replace conventional OPC or ILT completely due to its lack of required accuracy. However, it can provide an initial solution that is close enough to final OPC solution or ILT solution, therefore fast OPC and fast ILT can be realized.

Paper Details

Date Published: 20 March 2019
PDF: 9 pages
Proc. SPIE 10961, Optical Microlithography XXXII, 109610O (20 March 2019); doi: 10.1117/12.2515446
Show Author Affiliations
Xuelong Shi, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
YuHang Zhao, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Shoumian Cheng, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Ming Li, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Wei Yuan, Shanghai Integrated Circuit Research & Development Ctr. Co., Ltd. (China)
Leon Yao, ASML-Brion (China)
Wenhao Zhao, ASML-Brion (China)
Yanjun Xiao, ASML-Brion (China)
Xiaohui Kang, ASML-Brion (China)
Angmar Li, ASML Brion (China)


Published in SPIE Proceedings Vol. 10961:
Optical Microlithography XXXII
Jongwook Kye; Soichi Owa, Editor(s)

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