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Proceedings Paper

A smart litho friendly design method to enable fast lithography hotspots detection in design flow
Author(s): Xiaolong Ma; Yanxiang Liu; Xinyi Hu; Qijian Wan; Zhengfang Liu; Chunshan Du; Liguo Zhang
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Paper Abstract

When technology comes to 28nm and beyond, chip size and design complexity are increasing. Lithography simulation is computing intensive and it may takes days to see whether there is any hotspot hard to solve other than change the design. Pattern classification is quite a matured technique and it can be used to locate unique patterns on a chip, then it is possible to do lithography simulation on these unique pattern locations first. This is an efficient approach to quickly detect any unfriendly design style on the layout and give designers enough time to fix these unfriendly designs and do an incremental check to validate the fixing. Once the fixing approach is validated, a pattern matching based pattern substitution can be used to fix all the problematic areas on the layout.

Paper Details

Date Published: 20 March 2019
PDF: 6 pages
Proc. SPIE 10962, Design-Process-Technology Co-optimization for Manufacturability XIII, 1096215 (20 March 2019); doi: 10.1117/12.2515135
Show Author Affiliations
Xiaolong Ma, HiSilicon Technologies Co., Ltd. (China)
Yanxiang Liu, HiSilicon Technologies Co., Ltd. (China)
Xinyi Hu, Mentor Graphics Corp. (China)
Qijian Wan, Mentor Graphics Corp. (China)
Zhengfang Liu, Mentor Graphics Corp. (China)
Chunshan Du, Mentor Graphics Corp. (China)
Liguo Zhang, Mentor Graphics Corp. (United States)


Published in SPIE Proceedings Vol. 10962:
Design-Process-Technology Co-optimization for Manufacturability XIII
Jason P. Cain, Editor(s)

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