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Proceedings Paper

Predicting and optimizing etch recipes for across the wafer uniformity
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Paper Abstract

Uniformity of critical dimensions (CDs) across a wafer is an increasing challenge as both CDs and tolerances shrink. Plasma etch uniformity is achieved in part through reactor design and in part through the operating conditions or process recipe of the reactor. The identification of a recipe for a specific etch process is time consuming and expensive, requiring extensive experiments and metrology. Here we present two modules in SandBox StudioTM, SB-Bayesian and SBNeuralNet, to accelerate the prediction and optimization of etch recipes for across the wafer uniformity. A model of etch rates across the wafer is created that accounts for injector locations, gas flow rates and distribution and plasma powers. Synthetic experiments on etching line-space patterns on 300 mm wafers are performed and the CDs and their variations are computed at several hundred site locations. SB-Bayesian requires many fewer experiments to be calibrated and achieve an excellent qualitative match with the experimental data. SB-NeuralNet achieves comparable levels of accuracy to SBBayesian at predicting average CDs and uniformity, but it does not perform as well at predicting trends across the wafer. It is shown that neural nets require a prohibitive amount of experimental data to successfully predict wafer patterns. SBBayesian and SB-NeuralNet were used to create detailed process maps across the parameters space of interest to identify optimal recipes to achieve required CDs and tolerances. Both modules can predict optimal recipe conditions for achieving identified target CD and uniformity metrics. Using these tools, etch recipes for across the wafer uniformity are rapidly optimized at lower cost.

Paper Details

Date Published: 20 March 2019
PDF: 10 pages
Proc. SPIE 10963, Advanced Etch Technology for Nanopatterning VIII, 1096309 (20 March 2019); doi: 10.1117/12.2515097
Show Author Affiliations
Meghali Chopra, SandBox Semiconductor (United States)
Roger T. Bonnecaze, SandBox Semiconductor (United States)
Yang Ban, SandBox Semiconductor (United States)
Sofia Helpert, SandBox Semiconductor (United States)


Published in SPIE Proceedings Vol. 10963:
Advanced Etch Technology for Nanopatterning VIII
Richard S. Wise; Catherine B. Labelle, Editor(s)

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