
Proceedings Paper
Critical defect detection, monitoring and fix through process integration engineering by using D2DB pattern monitor solutionFormat | Member Price | Non-Member Price |
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Paper Abstract
Rigorous patterning control at critical wafer process steps of semiconductor fabrication is done to ensure integrity of the manufacturing process. At times, still with the entire existing process control infrastructure, we run into defect issues. Here we report an innovative methodology of Pattern Monitor that complements the existing approach and consistently detects critical defects on wafer that are hard to find using conventional wafer inspection tools. The unique integrated pattern centric approach puts this method apart from all the current inline tools. The Die-to-Database Pattern Monitor (D2DB-PM) solution has been applied to understand the evolution of pattern deformation through process integration engineering. A pattern centric engine is the key to this successful solution that is used to process large volumes of already existing Scanning Electron Microscope (SEM) images to perform Die-to-Database shape and critical dimension evaluation to detect deviations in the patterning behavior. This solution helped to resolve the limited Critical dimension (CD) measurement constraint that is otherwise associated with Critical Dimension Scanning Electron Microscope (CDSEM) measurement. In this paper we report the results from this innovative solution to detect process marginality and also verify the improved patterning behavior after the process fix is implemented.
Paper Details
Date Published: 20 March 2019
PDF: 7 pages
Proc. SPIE 10962, Design-Process-Technology Co-optimization for Manufacturability XIII, 109620L (20 March 2019); doi: 10.1117/12.2511672
Published in SPIE Proceedings Vol. 10962:
Design-Process-Technology Co-optimization for Manufacturability XIII
Jason P. Cain, Editor(s)
PDF: 7 pages
Proc. SPIE 10962, Design-Process-Technology Co-optimization for Manufacturability XIII, 109620L (20 March 2019); doi: 10.1117/12.2511672
Show Author Affiliations
Ming Tian, Shanghai Huali Microelectronics Corp. (China)
Yu Zhang, Shanghai Huali Microelectronics Corp. (China)
Tiapeng Guan, Shanghai Huali Microelectronics Corp. (China)
Jianghua Leng, Shanghai Huali Microelectronics Corp. (China)
Baojun Zhao, Shanghai Huali Microelectronics Corp. (China)
Lei Yan, Shanghai Huali Microelectronics Corp. (China)
Yu Zhang, Shanghai Huali Microelectronics Corp. (China)
Tiapeng Guan, Shanghai Huali Microelectronics Corp. (China)
Jianghua Leng, Shanghai Huali Microelectronics Corp. (China)
Baojun Zhao, Shanghai Huali Microelectronics Corp. (China)
Lei Yan, Shanghai Huali Microelectronics Corp. (China)
Wei Hua, Shanghai Huali Microelectronics Corp. (China)
Abhishek Vikram, Anchor Semiconductor, Inc. (United States)
Guojie Chen, Anchor Semiconductor, Inc. (China)
Hui Wang, Anchor Semiconductor, Inc. (China)
Gary Zhang, Anchor Semiconductor, Inc. (China)
Wenkui Liao, Anchor Semiconductor, Inc. (China)
Abhishek Vikram, Anchor Semiconductor, Inc. (United States)
Guojie Chen, Anchor Semiconductor, Inc. (China)
Hui Wang, Anchor Semiconductor, Inc. (China)
Gary Zhang, Anchor Semiconductor, Inc. (China)
Wenkui Liao, Anchor Semiconductor, Inc. (China)
Published in SPIE Proceedings Vol. 10962:
Design-Process-Technology Co-optimization for Manufacturability XIII
Jason P. Cain, Editor(s)
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