Hybrid III-V/Si laser integration on silicon photonic platform has been demonstrated several time using III-V direct bonding on top of patterned silicon [1-3]. Most of these former works have been achieved using small wafer diameter III-V fabrication line for post bonding process steps. The expected low-cost added value of silicon photonics cannot be sustained with such integration scheme. More recently, we present III-V laser integration with a CMOS compatible process using wafer to wafer bonding and 1 level of contact [4]. In this paper, we present the technological progresses on a 200mm fully CMOS compatible hybrid III-V/Si laser technology. We introduced an improved backend of line for hybrid lasers with 2 interconnection levels, W-plugs and fully planarized process offering a state of the art access resistance and a homogeneous current density distribution over the gain material. Second, in order to optimize the use of the costly III-V material and enable the laser large scale integration on silicon we present fabrication process with die to wafer molecular bonding with high bonding yield at wafer scale. These process features will be detailed and the impact of laser performances will be presented. Finally, the scalability towards 300mm for the overall platform will be discussed.

Date Published: 4 March 2019
PDF
Proc. SPIE 10922, Smart Photonic and Optoelectronic Integrated Circuits XXI, 109221O (4 March 2019); doi: 10.1117/12.2511155

Published in SPIE Proceedings Vol. 10922:
Smart Photonic and Optoelectronic Integrated Circuits XXI
Sailing He; El-Hang Lee, Editor(s)