Share Email Print

Proceedings Paper

Key issues in evaluating hot-carrier reliability
Author(s): James E. Chung
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Two key issues in evaluating the hot-carrier reliability of CMOS device technologies will be examined. First, the basis for establishing hot-carrier reliability criteria will be analyzed. The case will be made for incorporating information about circuit performance requirements and operating conditions into future hot-carrier reliability criteria rather than relying on more ambiguous criteria defined by device-performance requirements alone. Second, the impact of lower operating voltages on hot-carrier reliability criteria and models will be analyzed. An assessment will be made of the future significance and impact of hot-carrier degradation for future scaled CMOS technologies.

Paper Details

Date Published: 13 September 1996
PDF: 11 pages
Proc. SPIE 2875, Microelectronic Device and Multilevel Interconnection Technology II, (13 September 1996); doi: 10.1117/12.250889
Show Author Affiliations
James E. Chung, Massachusetts Institute of Technology (United States)

Published in SPIE Proceedings Vol. 2875:
Microelectronic Device and Multilevel Interconnection Technology II
Ih-Chin Chen; Nobuo Sasaki; Divyesh N. Patel; Girish A. Dixit, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?