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Proceedings Paper

Defect mapping and repair in UltraSPARC-I microprocessor memories
Author(s): Siva Paramanandam; Lynn Youngs
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Paper Abstract

Yield is perhaps the single most important measure of manufacturing efficiency for large integrated circuits like UltraSPARC-I. To accelerate continuous yield improvement, we have integrated memory test, repair, and defect mapping into the UltraSPARC-I manufacturing flow. We use the UltraSPARC-I memory test port, together with standard memory test equipment and integrated software, to detect, locate and repair defects in the larger memory arrays. Pattern- recognized memory defect maps are collected for every chip manufactured, accelerating the understanding of defects and their causes. As part of the manufacturing process, we also program a unique identity into each chip that can be read electronically. In this paper, we present the memory defect mapping system that has been established and our use of that system to accelerate yield learning.

Paper Details

Date Published: 12 September 1996
PDF: 9 pages
Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); doi: 10.1117/12.250827
Show Author Affiliations
Siva Paramanandam, Texas Instruments Inc. (United States)
Lynn Youngs, Texas Instruments Inc. (United States)

Published in SPIE Proceedings Vol. 2874:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II
Ali Keshavarzi; Sharad Prasad; Hans-Dieter Hartmann, Editor(s)

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