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Proceedings Paper

Mapping technique for VLSI/WSI implementation of multidimensional systolic arrays
Author(s): Mohamed B. Abdelrazik
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Paper Abstract

This paper describes a mapping technique for transforming a linear systolic array into multidimensional systolic arrays in order to achieve high-speed with less overhead. This technique is systematic, therefore, it would be useful for logic synthesis. The application of this technique in DSP and numerical computations reduces the design time which results in low design cost. This technique produces various structures (semi-systolic, quasi-systolic and pure systolic arrays) which could be considered as application specific array processors.

Paper Details

Date Published: 1 September 1990
PDF: 9 pages
Proc. SPIE 1360, Visual Communications and Image Processing '90: Fifth in a Series, (1 September 1990); doi: 10.1117/12.24220
Show Author Affiliations
Mohamed B. Abdelrazik, Brunel Univ. (United Kingdom)

Published in SPIE Proceedings Vol. 1360:
Visual Communications and Image Processing '90: Fifth in a Series
Murat Kunt, Editor(s)

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